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Truth Tables and Digital Logic Gates in Modern Physics
Truth tables are exhaustive mathematical tables that display all possible input logic combinations for a logic gate or digital circuit alongside their corresponding binary output. They form the foundational basis for analyzing combinational logic circuits in digital electronics.
UP TGT ScienceUP PGT PhysicsStudy Notes + Practice
Scope and prerequisites
TGT core
Basic logic gates (AND, OR, NOT, NAND, NOR) and their truth tables, Boolean algebra basics, and simple symbol identification.
PGT extension
Universal gates (NAND and NOR), XOR and XNOR gates, De Morgan's theorems, and complex combinational logic network analysis.
Prerequisites
Binary number system (base-2)
Concept of logic levels (HIGH=1, LOW=0)
Basic semiconductor diode and transistor switching behavior
Fundamental Logic Gates (AND, OR, NOT)
The NOT gate (inverter) takes a single input A and produces an output Y = Ā, inverting the logic state.
The AND gate produces a HIGH output (1) if and only if all of its inputs are HIGH, expressed as $Y = A • B$.
The OR gate produces a HIGH output (1) if at least one of its inputs is HIGH, expressed as $Y = A + B$.
Universal Gates (NAND and NOR)
A NAND gate is a combination of an AND gate followed by a NOT gate, yielding an output $Y = A • B̄$.
A NOR gate is a combination of an OR gate followed by a NOT gate, yielding an output $Y = A + B̄$.
Both NAND and NOR gates are termed universal gates because any boolean function or logic gate can be implemented entirely using either type alone.
Exclusive-OR (XOR) and Exclusive-NOR (XNOR) Gates
The XOR gate produces a HIGH output when the number of HIGH inputs is odd, acting as a controlled inverter or binary adder component.
The XNOR gate produces a HIGH output when all inputs are identical (even number of 1s), functioning as an equality detector.
Boolean expression for two-input XOR is $Y = ĀB + AB̄$ and for XNOR is $Y = AB + ĀB̄$.
Boolean Laws and Simplification via Truth Tables
Truth tables verify Boolean identities such as De Morgan's laws: (A + B)̄ = Ā • B̄ and (A • B)̄ = Ā + B̄.
Any combinational logic circuit with n binary inputs requires 2ⁿ rows in its truth table to map every possible input combination.
Logic minimization using truth tables ensures optimal hardware implementation with minimum gate count.
Derivations
Equivalence of NAND Gate as a Universal NOT Gate
Conditions: All inputs of an n-input NAND gate are tied together to a single input A.
Let a 2-input NAND gate have inputs connected together such that A = B.
The standard output equation for a NAND gate is Y = overline{A cdot B}.
Substitute B = A into the equation: Y = overline{A cdot A}.
Using Boolean idempotent law (A • A = A), the equation simplifies to Y = overline{A}.
Result: A multi-input NAND gate with shorted inputs functions identically to a NOT gate.
De Morgan's First Law Verification via Truth Table
Conditions: Two binary variables A and B evaluated across all four input combinations.
Construct a truth table with columns for A, B, A + B, overline{A+B}, overline{A}, overline{B}, and overline{A}cdotoverline{B}.
Evaluate A + B for all combinations (0,0; 0,1; 1,0; 1,1) and invert to get overline{A+B}.
Independently evaluate overline{A} and overline{B} and compute their logical AND product overline{A}cdotoverline{B}.
Compare the output column of overline{A+B} with the column of overline{A}cdotoverline{B} row by row.
A = Input, Y = Output Dimensionless binary logic states
Single input terminal
AND Gate Boolean Relation
$$Y = A \cdot B$$
A, B = Inputs, Y = Output Dimensionless binary logic states
Two or more inputs
OR Gate Boolean Relation
$$Y = A + B$$
A, B = Inputs, Y = Output Dimensionless binary logic states
Two or more inputs
NAND Gate Boolean Relation
$$Y = overline{A \cdot B}$$
A, B = Inputs, Y = Output Dimensionless binary logic states
Universal gate operation
NOR Gate Boolean Relation
$$Y = overline{A + B}$$
A, B = Inputs, Y = Output Dimensionless binary logic states
Universal gate operation
XOR Gate Boolean Relation
$$Y = A oplus B = overline{A}B + Aoverline{B}$$
A, B = Inputs, Y = Output Dimensionless binary logic states
Inequality detector
XNOR Gate Boolean Relation
$$Y = overline{A oplus B} = AB + overline{A}overline{B}$$
A, B = Inputs, Y = Output Dimensionless binary logic states
Equality detector
Combinational Rows Formula
$$N_{rows} = 2^{n}$$
n = Number of independent input variables, $N_rows = Total rows in truth table$ Count (Integer)
Discrete binary digital systems
Graphs and experiments
Logic Gate Voltage Transfer Characteristic (VTC)
Draw: Plot of Output Voltage (V_out) versus Input Voltage (V_in) showing sharp transition region between logic LOW and logic HIGH thresholds.
Interpret: Demonstrates noise margin and threshold voltage (V_IL and V_IH) where the transistor switches state.
Exam use: Tested in conceptual questions regarding non-ideal gate behavior and voltage levels.
Timing Diagram of a Logic Circuit
Draw: Square wave input voltage pulses versus time for inputs A and B, aligned with the resulting output pulse train Y for an AND or OR gate.
Interpret: Illustrates propagation delay and real-time transient response of digital gates corresponding to truth table states.
Exam use: Used in PGT questions asking to identify gate types from input-output timing waveforms.
Diode-Resistor Logic (DRL) AND Gate Circuit Setup
Draw: Circuit diagram featuring two diodes connected to inputs A and B with cathodes tied together and pulled up to +V_cc through a resistor.
Interpret: Shows physical realization of digital logic states using discrete semiconductor diodes governed by forward/reverse biasing.
Exam use: Asked in core electronics practical physics and conceptual circuit analysis.
Solved numericals
TGT core
Identify the output Y of a two-input NAND gate when input A = 1 and input B = 0.
Recall the Boolean expression for a NAND gate: Y = overline{A cdot B}.
Substitute the given values: A = 1 and B = 0 into the expression.
Compute the AND product: 1 cdot 0 = 0.
Apply the NOT operation: Y = overline{0} = 1.
Answer: Y = 1 (HIGH)
TGT core
How many rows are present in the truth table of a combinational logic circuit having 4 independent binary inputs?
Identify the number of input variables: n = 4.
Apply the formula for total truth table rows: $N = 2^{n}$.
Calculate 2^4 = 16.
Answer: 16 rows
PGT extension
Using Boolean algebra and truth table verification, simplify the expression $Y = AB + A(B + C) + B(B + C)$.
Expand terms using distributive law: $Y = AB + AB + AC + BB + BC$.
Apply idempotent laws (AB + AB = AB and B$B = B): Y = AB + AC + B + BC$.
Apply absorption law on B + BC (since B + B$C = B(1 + C) = B): Y = AB + AC + B$.
Apply absorption law on AB + B (since B + A$B = B): Y = B + AC$.
Answer: $Y = B + AC$
Assumptions and limitations
Assumes ideal binary logic levels where voltages strictly represent discrete states 0 (0 V) and 1 (+5 V or +V_cc), ignoring transient voltage fluctuations and noise margins in real physical hardware.
Common misconceptions
Common error: A truth table can only have inputs represented by numerical values without physical meaning.
Correct: Truth tables represent abstract binary logic states that correspond directly to physical voltage levels or switch positions in circuits.
Digital abstraction bridges mathematical logic with semiconductor electronics.
Common error: NAND and NOR gates are called universal gates because they are cheaper to manufacture.
Correct: They are called universal gates because any Boolean function can be implemented exclusively using either NAND or NOR gates alone.
Universality is a functional property derived from functional completeness in logic.
Quick revision
AND gate outputs 1 only when all inputs are 1; OR gate outputs 0 only when all inputs are 0.
NOT Gate Boolean Relation: Y = overline{A}
AND Gate Boolean Relation: Y = A cdot B
Must remember
The NOT gate inverts a single input terminal producing $Y = \overline{A}$.
The AND gate yields a HIGH output only when all inputs are HIGH ($Y = A \cdot B$).
The OR gate yields a HIGH output if at least one input is HIGH ($Y = A + B$).
NAND and NOR gates are universal gates because any boolean function can be realized using only one type of gate.
The XOR gate acts as an odd-bit detector and binary adder component with $Y = \overline{A}B + A\overline{B}$.
The XNOR gate functions as an equality detector yielding HIGH when all inputs are identical ($Y = AB + \overline{A}\overline{B}$).
De Morgan's laws state that $\overline{A + B} = \overline{A} \cdot \overline{B}$ and $\overline{A \cdot B} = \overline{A} + \overline{B}$.
A combinational logic circuit with $n$ inputs requires $N_{rows} = 2^{n}$ rows in its truth table.
Glossary
NOT GateAn inverter logic gate that takes a single binary input and produces its complement as output.
AND GateA logic gate that produces a HIGH output if and only if all inputs are HIGH.
OR GateA logic gate that produces a HIGH output if one or more inputs are HIGH.
Universal GateA logic gate (such as NAND or NOR) that can implement any Boolean function without needing any other gate type.
XOR GateExclusive-OR gate producing a HIGH output when an odd number of inputs are HIGH.
XNOR GateExclusive-NOR gate acting as an equality detector, producing HIGH when inputs match.
De Morgan's LawsFundamental Boolean algebra theorems relating logical operations of AND, OR, and NOT.
Comparison of Fundamental and Universal Gates
Gate Type
Boolean Expression
Key Characteristic
AND
$Y = A \cdot B$
Output is 1 only when all inputs are 1
OR
$Y = A + B$
Output is 1 when any input is 1
NOT
$Y = \overline{A}$
Single input complement operation
NAND
$Y = \overline{A \cdot B}$
Universal gate; AND followed by NOT
NOR
$Y = \overline{A + B}$
Universal gate; OR followed by NOT
Practice Quiz
Choose an option to reveal the explanation.
1. Which of the following logic gates produces a HIGH output if and only if all its inputs are HIGH?
Explanation: The AND gate produces a HIGH ($1$) output only when all of its inputs are HIGH, expressed as $Y = A \cdot B$.
2. What is the Boolean expression for a NOT gate with input $A$ and output $Y$?
Explanation: The NOT gate (inverter) takes a single input $A$ and produces an output $Y = \overline{A}$, inverting the logic state.
3. Why are NAND and NOR gates referred to as universal gates?
Explanation: NAND and NOR gates are termed universal gates because any boolean function or logic gate can be implemented entirely using either type alone.
4. How many rows are required in the truth table of a combinational logic circuit with $4$ independent binary inputs?
Explanation: A combinational logic circuit with $n$ binary inputs requires $N_{rows} = 2^{n}$ rows. For $n = 4$, $N_{rows} = 2^{4} = 16$.
5. Which logic gate acts as an equality detector, yielding a HIGH output when all its inputs are identical?
Explanation: The XNOR gate produces a HIGH output when all inputs are identical (even number of 1s), functioning as an equality detector with $Y = AB + \overline{A}\overline{B}$.
6. What is the correct Boolean expression for De Morgan's first law as verified by truth tables?
Explanation: De Morgan's laws include $\overline{A + B} = \overline{A} \cdot \overline{B}$ and $\overline{A \cdot B} = \overline{A} + \overline{B}$.
7. For a two-input XOR gate, what is the standard Boolean expression?
Explanation: The Boolean expression for a two-input XOR gate is $Y = \overline{A}B + A\overline{B}$, producing a HIGH output when the number of HIGH inputs is odd.
8. An OR gate produces a HIGH output if:
Explanation: The OR gate produces a HIGH output ($1$) if at least one of its inputs is HIGH, expressed as $Y = A + B$.
9. Which of the following represents the correct combination of gates forming a NAND gate?
Explanation: A NAND gate is a combination of an AND gate followed by a NOT gate, yielding an output $Y = \overline{A \cdot B}$.
10. What is the physical interpretation of binary logic states in digital electronics?
Explanation: Truth tables represent abstract binary logic states that correspond directly to physical voltage levels or switch positions in circuits.
11. If the inputs to an XNOR gate are $A = 0$ and $B = 0$, what is the output $Y$?
Explanation: An XNOR gate functions as an equality detector. When $A = 0$ and $B = 0$, the inputs are identical, so the output is $Y = 1$.
12. Which theorem states that the complement of a product is equal to the sum of the complements?
Explanation: De Morgan's theorem states that $\overline{A \cdot B} = \overline{A} + \overline{B}$ (the complement of a product is the sum of the complements).
13. In logic minimization, what is the primary benefit of using truth tables and boolean algebra?
Explanation: Logic minimization using truth tables ensures optimal hardware implementation with minimum gate count, reducing cost and propagation delay.
14. What is the output of a two-input XOR gate when both inputs are HIGH ($1$) and ($1$)?
Explanation: An XOR gate outputs HIGH when the number of HIGH inputs is odd. With $A = 1$ and $B = 1$, the number of 1s is even ($2$), so the output is $0$.
15. Which gate is formed by placing a NOT gate after an OR gate?
Explanation: A NOR gate is a combination of an OR gate followed by a NOT gate, yielding an output $Y = \overline{A + B}$.
PYQ Patterns
These are pattern-based practice questions. Authentic year labels are only used when verified from a source.
1. The logic circuit shown below is equivalent to which single gate? (Consider inputs $A$ and $B$ connected to a circuit yielding $\overline{A+B}$ combined with an inverter)
Explanation: A NOR gate followed by a NOT (inverter) gate cancels the inversion, resulting in an OR gate operation ($Y = \overline{\overline{A+B}} = A+B$).
2. What input combination $(A, B)$ will give a logic HIGH output for the Boolean expression $Y = \overline{A}B + A\overline{B}$?
Explanation: The expression $Y = \overline{A}B + A\overline{B}$ is the XOR operation, which yields HIGH when inputs are unequal, i.e., $(0, 1)$ or $(1, 0)$.
3. If the output of a logic gate is given by $Y = \overline{\overline{A} \cdot \overline{B}}$, identify the equivalent single gate using De Morgan's laws.
Explanation: By De Morgan's law, $\overline{\overline{A} \cdot \overline{B}} = \overline{\overline{A}} + \overline{\overline{B}} = A + B$, which is the OR gate.
4. A digital circuit has three inputs $A, B, C$. How many rows are present in its complete truth table?
Explanation: Using the formula $N_{rows} = 2^{n}$, for $n = 3$ inputs, the number of rows is $2^{3} = 8$.
5. Which of the following Boolean expressions represents an XNOR operation for inputs $A$ and $B$?
Explanation: The XNOR gate Boolean relation is $Y = AB + \overline{A}\overline{B}$, functioning as an equality detector.
6. In terms of universal gates, how many NAND gates are minimally required to construct a basic NOT gate?
Explanation: A NOT gate can be constructed from a single NAND gate by tying both of its input terminals together ($A = B$), giving $Y = \overline{A \cdot A} = \overline{A}$.
Timed Topic Test
Attempt these questions under a ten-minute limit using a separate timer.
1. Which gate is represented by the Boolean expression $Y = \overline{A \cdot B}$?
Explanation: A NAND gate combines an AND operation with a NOT operation, yielding $Y = \overline{A \cdot B}$.
2. The truth table for a two-input logic gate gives outputs $0, 0, 0, 1$ for inputs $(0,0), (0,1), (1,0), (1,1)$ respectively. Identify the gate.
Explanation: The output is $1$ only when both inputs are $1$, which defines the AND gate.
3. According to De Morgan's theorem, $\overline{A + B}$ is equal to:
Explanation: De Morgan's law states that the complement of a sum is equal to the product of the complements: $\overline{A + B} = \overline{A} \cdot \overline{B}$.
4. What is the primary function of an XOR gate in digital systems?
Explanation: The XOR gate produces a HIGH output when the number of HIGH inputs is odd, acting as a controlled inverter or binary adder component.
5. If $A = 1$ and $B = 0$, what is the output of a NOR gate?
Explanation: For a NOR gate, $Y = \overline{A + B}$. With $A = 1$ and $B = 0$, $A + B = 1$, so its complement is $\overline{1} = 0$.
6. How many input combinations are evaluated in the truth table of a 3-input AND gate?
Explanation: For $n = 3$ inputs, the number of rows in the truth table is $2^{3} = 8$.
7. Which logic gate outputs $1$ when the inputs are different and $0$ when the inputs are the same?
Explanation: The XOR gate outputs $1$ for an odd number of HIGH inputs (i.e., when inputs are different in a 2-input setup), acting as an inequality detector.
8. Which of the following expressions is a direct consequence of logic minimization and Boolean laws?
Explanation: By absorption law in Boolean algebra, $A \cdot (A + B) = A \cdot A + A \cdot B = A(1 + B) = A$.
9. In digital electronics, what does a bubble (small circle) at the output terminal of a logic gate symbol denote?
Explanation: In schematic diagrams, a bubble at an output or input terminal represents logical inversion (NOT operation).
10. Can a complex combinational circuit with multiple inputs and outputs be constructed using only NOR gates?
Explanation: Yes, NOR gates are universal gates, meaning any boolean function or logic circuit can be implemented entirely using NOR gates alone.