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Modern Physics
Logic Gates and Digital Electronics
Logic gates are fundamental building blocks of digital integrated circuits that perform logical operations on one or more binary inputs to produce a single binary output. They operate on binary algebra using voltage levels representing discrete states '0' (LOW) and '1' (HIGH).
UP TGT ScienceUP PGT PhysicsStudy Notes + Practice
Scope and prerequisites
TGT core
Truth tables, Boolean expressions, and operation of basic logic gates (AND, OR, NOT) and universal gates (NAND, NOR).
PGT extension
Transistor-transistor logic (TTL) configurations, Boolean algebraic theorems, De Morgan's laws, and construction of combinational/sequential logic circuits.
Prerequisites
Energy bands in solids and semiconductor physics
Operation and characteristics of semiconductor diodes
Bipolar junction transistors (BJT) in switch mode
Basic Logic Gates (AND, OR, NOT)
The AND gate yields a HIGH output only if all its inputs are HIGH; represented by Boolean multiplication $Y = A • B$.
The OR gate yields a HIGH output if at least one input is HIGH; represented by Boolean addition $Y = A + B$.
The NOT gate (inverter) inverts the input state, yielding Y = A' (or \bar{A}).
Universal Gates (NAND and NOR)
A NAND gate is a combination of an AND gate followed by a NOT gate, with output $Y = (A • B)'$.
A NOR gate is a combination of an OR gate followed by a NOT gate, with output $Y = (A + B)'$.
NAND and NOR gates are termed universal gates because any boolean function or basic gate can be implemented using only NAND or only NOR gates.
Exclusive-OR (XOR) and Exclusive-NOR (XNOR) Gates
The XOR gate produces a HIGH output when the number of HIGH inputs is odd, with equation $Y = A\bar{B} + \bar{A}B$.
The XNOR gate produces a HIGH output when both inputs are identical, serving as an equality detector with equation $Y = AB + \bar{A}\bar{B}$.
XOR and XNOR are extensively used in arithmetic logic units (ALUs) for binary addition and parity checking.
Boolean Algebra and De Morgan's Laws
Boolean algebra uses laws such as commutative (A+$B = B+A)$, associative, and distributive laws to simplify logic expressions.
De Morgan's First Law states that the complement of a sum is equal to the product of the complements: (A + B)' = A' • B'.
De Morgan's Second Law states that the complement of a product is equal to the sum of the complements: (A • B)' = A' + B'.
Derivations
Realization of Basic Gates using NAND Universal Gates
Conditions: Using only standard 2-input NAND gate modules
To obtain a NOT gate: Tie both inputs of a NAND gate together to a single input A. The output is $Y = (A • A)' = A'$.
To obtain an AND gate: Pass the output of a NAND gate through a NAND-configured NOT gate. The output is $Y = ((A • B)')' = A • B$.
To obtain an OR gate: Apply De Morgan's law to inputs by inverting each input using NAND-inverters before feeding them into a NAND gate: $Y = (A' • B')' = A'' + B'' = A + B$.
Result: Basic gates (NOT, AND, OR) successfully constructed using only NAND gates.
Simplification of Boolean Expression using De Morgan's Laws
A, B = Boolean variables Dimensionless logic relation
Boolean algebra domain
Graphs and experiments
Voltage Transfer Characteristic (VTC) of a NOT Gate (Inverter)
Draw: A plot of output voltage (V_o) versus input voltage (V_i) showing a sharp transition from high voltage (V_OH) to low voltage (V_OL) at the threshold voltage V_th.
Interpret: Demonstrates the nonlinear switching behavior of a transistor operating between cutoff and saturation regions.
Exam use: Tested conceptually for noise margin and threshold voltage identification in digital electronics.
Timing Diagram for Logic Gates
Draw: Square wave input signals A(t) and B(t) plotted against time, alongside the resulting output waveform Y(t) for an AND or NAND gate.
Interpret: Shows propagation delay and transient response as inputs change states between 0 and 1.
Exam use: Used in multi-choice questions to determine output pulse trains for given input timing charts.
Diode-Resistor Logic (DRL) AND Gate Circuit
Draw: Schematic diagram showing two diodes with cathodes connected to inputs A and B, anodes connected via a pull-up resistor to +V_CC, and output taken across the common cathode junction.
Interpret: Illustrates how semiconductor diodes perform elementary digital logic through directional current flow.
Exam use: Frequently asked in historical or foundational circuit analysis questions for TGT/PGT.
Solved numericals
TGT core
Identify the logic operation performed by the circuit where inputs A and B are connected to a NOR gate, and its output is fed into a NOT gate.
Step 1: Write the output of the NOR gate: $Y_1 = (A + B)'$.
Step 2: Pass this output through the NOT gate: $Y = (Y_1)' = ((A + B)')'$.
Step 3: Apply double complement law: $Y = A + B$.
Answer: OR gate
PGT extension
Simplify the Boolean expression using Boolean laws: $Y = AB + A(B + C) + B(B + C)$.
Step 1: Expand terms using distributive law: $Y = AB + AB + AC + BB + BC$.
Step 2: Apply idempotent laws (AB + AB = AB, B$B = B): Y = AB + AC + B + BC$.
Step 3: Group terms involving B: $Y = B(1 + A + C) + AC$.
Step 4: Since (1 + A + C) = 1, the expression reduces to $Y = B + AC$.
Answer: $Y = B + AC$
PGT extension
Find the output Y of a combinational circuit where input A and B are given to a NAND gate and an OR gate respectively, and their outputs are combined using an AND gate.
Step 1: Output of NAND gate: $P = (A • B)'$.
Step 2: Output of OR gate: $Q = A + B$.
Step 3: Combine P and Q with an AND gate: $Y = P • Q = (A • B)' • (A + B)$.
Answer: $Y = (A • B)' • (A + B)$
Assumptions and limitations
Assumption of ideal digital abstraction where voltages are strictly confined to discrete binary levels (0 and 1) without accounting for real-world signal degradation, noise, or continuous intermediate voltage levels.
Common misconceptions
Common error: A NAND gate connected with tied inputs acts as an AND gate.
Correct: A NAND gate with tied inputs acts as a NOT gate.
When input A is tied to both inputs of a NAND gate, the output is (A • A)' = A', which is the definition of a NOT gate.
Common error: De Morgan's law states that (A • B)' = A' • B'.
Correct: (A • B)' = A' + B'.
The complement of a product equals the sum of the individual complements, not their product.
Quick revision
NAND and NOR are universal gates because any boolean function can be constructed using only them.
AND Gate Boolean Expression: Y = A \cdot B
OR Gate Boolean Expression: $Y = A + B$
Must remember
The AND gate output is $Y = A \cdot B$, yielding $1$ only if all inputs are $1$.
The OR gate output is $Y = A + B$, yielding $1$ if at least one input is $1$.
The NOT gate inverts the input, giving $Y = \overline{A}$.
NAND and NOR gates are termed universal gates because any boolean function can be implemented using only them.
De Morgan's First Law states that $\overline{A + B} = \overline{A} \cdot \overline{B}$.
De Morgan's Second Law states that $\overline{A \cdot B} = \overline{A} + \overline{B}$.
The XOR gate output is $Y = A \oplus B = A\overline{B} + \overline{A}B$, acting as an odd parity detector.
The XNOR gate output is $Y = AB + \overline{A}\overline{B}$, acting as an equality detector.
Glossary
Logic GateAn idealized or physical electronic circuit implementing a Boolean function, performing logical operations on one or more binary inputs.
Universal GateA gate (such as NAND or NOR) that can be used to construct any other basic logic gate or complex Boolean expression.
Boolean AlgebraA branch of algebra in which the values of the variables are the truth values $0$ and $1$, used to analyze and simplify digital logic circuits.
De Morgan's LawsRules relating conjunction and disjunction in terms of negation, fundamental to simplifying Boolean expressions.
Basic vs Universal Gates
Feature
Basic Gates (AND, OR, NOT)
Universal Gates (NAND, NOR)
Primary Function
Perform elementary logical operations
Implement any logic function independently
Combinability
Require multiple types to build arbitrary functions
Can solely form complete digital systems
XOR vs XNOR Gates
Feature
XOR Gate
XNOR Gate
Boolean Expression
$Y = A\overline{B} + \overline{A}B$
$Y = AB + \overline{A}\overline{B}$
High Output Condition
When inputs are different (odd number of highs)
When inputs are identical (equality detector)
Practice Quiz
Choose an option to reveal the explanation.
1. Which of the following logic gates yields a HIGH output only when all its inputs are HIGH?
Explanation: The $AND$ gate is defined by the Boolean expression $Y = A \cdot B$, producing a HIGH ($1$) output exclusively when every input is HIGH.
2. What is the Boolean expression for a $NOR$ gate with inputs $A$ and $B$?
Explanation: A $NOR$ gate combines an $OR$ operation followed by a $NOT$ inversion, resulting in $Y = \overline{A + B}$.
3. Why are $NAND$ and $NOR$ gates called universal gates?
Explanation: Universal gates possess the property that any arbitrary logic function or basic gate ($AND$, $OR$, $NOT$) can be constructed entirely using only $NAND$ or only $NOR$ gates.
4. De Morgan's First Law is represented by which of the following expressions?
Explanation: De Morgan's First Law states that the complement of a sum is equal to the product of the individual complements: $\overline{A + B} = \overline{A} \cdot \overline{B}$.
5. An $XOR$ gate produces a HIGH output when:
Explanation: The $XOR$ gate equation $Y = A\overline{B} + \overline{A}B$ yields a HIGH output specifically when an odd number of inputs are HIGH (i.e., inputs are different).
6. What is the output of a $NAND$ gate when both of its inputs $A$ and $B$ are connected together (tied inputs)?
Explanation: When input $A$ is tied to both inputs of a $NAND$ gate, the output becomes $\overline{A \cdot A} = \overline{A}$, which functions as a $NOT$ gate.
7. Which gate acts as an equality detector, yielding a HIGH output when both inputs are identical?
Explanation: The $XNOR$ gate output is $Y = AB + \overline{A}\overline{B}$, which is HIGH if and only if both inputs are equal ($0,0$ or $1,1$).
8. According to De Morgan's Second Law, the expression $\overline{A \cdot B}$ is equivalent to:
Explanation: De Morgan's Second Law states that the complement of a product equals the sum of the complements: $\overline{A \cdot B} = \overline{A} + \overline{B}$.
9. Which of the following Boolean laws represents the commutative property of addition?
Explanation: The commutative law of addition states that the order of addition does not affect the outcome: $A + B = B + A$.
10. What is the primary application of $XOR$ and $XNOR$ gates in digital systems?
Explanation: $XOR$ and $XNOR$ gates are heavily utilized in ALUs for implementing binary addition, subtraction, and parity checking routines.
11. If input $A = 0$ and input $B = 1$, what is the output of an $OR$ gate?
Explanation: For an $OR$ gate, $Y = A + B = 0 + 1 = 1$. Since at least one input is HIGH, the output is HIGH.
12. What type of gate is formed if the output of an $AND$ gate is inverted by a $NOT$ gate?
Explanation: A $NAND$ gate is defined precisely as an $AND$ gate followed by a $NOT$ gate.
13. What is the Boolean representation of a $NOT$ gate with input $A$?
Explanation: The $NOT$ gate (inverter) inverts the input state, yielding $Y = \overline{A}$.
14. Which logic gate combination is equivalent to a basic $OR$ gate when using only universal $NAND$ gates?
Explanation: By De Morgan's law, $A + B = \overline{\overline{A} \cdot \overline{B}}$, meaning an $OR$ gate can be built by inverting inputs $A$ and $B$ and feeding them into a $NAND$ gate.
15. Which of the following represents valid positive logic convention for an $AND$ gate?
Explanation: In positive logic convention, the higher voltage level represents binary $1$ (HIGH) and the lower voltage level represents binary $0$ (LOW).
PYQ Patterns
These are pattern-based practice questions. Authentic year labels are only used when verified from a source.
1. The logic circuit shown yields an output $Y = 1$ for inputs $(A, B, C) = (0, 0, 1)$. What could be the gate combination if the circuit represents $Y = \overline{A+B} \cdot C$?
Explanation: The expression $\overline{A+B} \cdot C$ signifies a $NOR$ gate for inputs $A$ and $B$, whose output is combined with $C$ via an $AND$ gate.
2. Simplify the Boolean expression $Y = A \cdot (A + B)$ using Boolean algebra laws.
Explanation: Using the absorption law: $A \cdot (A + B) = A \cdot A + A \cdot B = A + A \cdot B = A(1 + B) = A$.
3. Find the output $Y$ of the combination where inputs $A$ and $B$ are fed into a $NAND$ gate, and the result is fed into a $NOT$ gate.
Explanation: A $NAND$ gate gives $\overline{A \cdot B}$. Inverting this via a $NOT$ gate gives $\overline{\overline{A \cdot B}} = A \cdot B$, which is equivalent to an $AND$ gate.
4. What is the equivalent Boolean expression for $\overline{\overline{A} + \overline{B}}$?
Explanation: Applying De Morgan's First Law, $\overline{\overline{A} + \overline{B}} = \overline{\overline{A}} \cdot \overline{\overline{B}} = A \cdot B$.
5. For a combinational logic circuit, if the inputs are $A = 1, B = 0, C = 1$, evaluate $Y = (A \oplus B) \cdot \overline{C}$.
Explanation: Here, $A \oplus B = 1 \oplus 0 = 1$. The term $\overline{C} = \overline{1} = 0$. Thus, $Y = 1 \cdot 0 = 0$.
6. Which of the following circuits can implement any Boolean function without needing any other gate type?
Explanation: $NAND$ (and $NOR$) gates are universal gates; any logic function can be constructed using exclusively $NAND$ gates.
Timed Topic Test
Attempt these questions under a ten-minute limit using a separate timer.
1. What is the output $Y$ of a $NOR$ gate when both inputs are $0$?
Explanation: For a $NOR$ gate, $Y = \overline{A + B}$. When $A = 0$ and $B = 0$, $Y = \overline{0 + 0} = \overline{0} = 1$.
2. Which Boolean identity correctly represents the distributive law $A + (B \cdot C)$?
Explanation: The distributive law in Boolean algebra states that $A + (B \cdot C) = (A + B) \cdot (A + C)$.
3. How many $NAND$ gates are minimally required to construct an $AND$ gate?
Explanation: An $AND$ gate is formed by a $NAND$ gate followed by a $NOT$ gate (which is constructed from $1$ $NAND$ gate). Thus, a total of $2$ $NAND$ gates are needed.
4. Evaluate the expression $Y = A \cdot \overline{A}$ in Boolean algebra.
Explanation: By the complement law, a variable ANDed with its complement always results in $0$ ($A \cdot \overline{A} = 0$).
5. The truth table for which gate matches the negation of an $XOR$ gate?
Explanation: $XNOR$ stands for Exclusive-NOR, which is precisely the inverted output of an $XOR$ gate.
6. What is the output of an $AND$ gate with inputs $A = 1$ and $B = 0$?
Explanation: An $AND$ gate requires all inputs to be HIGH. Since $B = 0$, the output is $Y = 1 \cdot 0 = 0$.
7. Which logic gate combination represents the Boolean expression $Y = \overline{A}B + A\overline{B}$?
Explanation: The expression $\overline{A}B + A\overline{B}$ is the canonical definition of an $XOR$ gate.
8. Simplify the expression $Y = A + A \cdot B$.
Explanation: Using the absorption law: $A + A \cdot B = A(1 + B) = A \cdot 1 = A$.
9. If $A = 1$ and $B = 1$, what is the output of a $NAND$ gate?
Explanation: A $NAND$ gate gives $\overline{1 \cdot 1} = \overline{1} = 0$. It yields LOW only when all inputs are HIGH.
10. Which of the following is NOT a basic logic gate?
Explanation: $NAND$ is classified as a universal gate, whereas $AND$, $OR$, and $NOT$ are the three fundamental basic logic gates.